ThreadX for Hitachi SH

Highlights

Complete SH family support, including SH1, SH2, SH3, SH4 AND SH-DSP
Reasonable pricing
No Royalties
Complete ANSI C source code
Easy to use and powerful services
Responsive Technical Support
Unlimited Threads, Queues, Event Flags, Timers, Semaphores, Mutexes, Block Pools, and Byte Pools
Flexible memory usage
Timeout available on all thread suspension
Advanced preemption-threshold technique
Low-overhead Application Timers
Size scales automatically
picokernel architecture for size and speed
Small footprint (as low as 3 Kbytes)
Fast Execution (1.8 us context switch@20MHz, 0 wait-states, SH3)

Improve Your SH Development

Let our extensive experience with the Hitachi's SH family of microprocessors help your product development. ThreadX, our high-performance real-time kernel, helps improve your product's quality and its time-to-market. In addition, using ThreadX makes it easier to enhance your product in the future.

SH Optimizations

ThreadX optimizes context switching on the Hitachi SH. When context switching occurs inside of a ThreadX service call, only the registers preserved across function calls are saved as part of the thread's context, i.e. registers R8-R14, PR, MACH and MACL.

A similar technique is used in interrupt handling. On the front end of interrupt service routines, only the compiler's scratch registers are saved initially (registers R0-R7). The full register set is saved only if thread preemption is required.

Further Optimizations for SH3

ThreadX is further optimized for the SH3. Register Bank 1 (BANK1) is used on the front-end of interrupt context saving for improved performance. When initial context saving is done, Register Bank 0 is available for use - including nested interrupts.

Development Tool Choices

ThreadX is completely compatible with all the major Hitachi SH development tools, including GNU, Hitachi, and Green Hills MULTI development tools. Additional ThreadX-aware debugging is available with MULTI from Green Hills.