- Small-footprint (small as 2KB, automatic scaling)
- Fast execution (sub microsecond context switch)
- Supports all popular processors and tools (see below)
- TraceX system analysis support
- Advanced Technology:
- Preemption-Threshold™
- Event Chaining™
- Performance Metrics
- Execution Profiling
- Run-time and Static Stack Analysis
- Multicore Support (SMP and AMP)
- Downloadable Application Modules
- Memory Protection for Downloadable Application Modules
- Extensive ThreadX ecosystem
- Safety Certifications (DO-178B, FDA510(k), IEC61508, etc)
- Deployed in over 1,000,000,000 devices
- Full Source Code
- Royalty-Free
- A2P
- AMD G-Series
- ARC
- ARM/Thumb
- AVR32
- BlackFin
- CEVA-TeakLite-III
- ColdFire/68K
- Freescale i.MX Family
- Freescale Kinetis
- Hitachi H8/300H
- Leon3
- Luminary Micro’s Stellaris®
- M-CORE
- MicroBlaze
- Microchip PIC24/dsPIC
- Microchip PIC32
- MIPS
- Nios II
- Power Architecture
- Renesas RX
- Renesas SH
- Renesas V8xx
- SHARC
- StarCore
- STMicroelectronics STM32
- StrongARM
- TMS320C54x
- TMS320C6x
- Win32
- x86/x386
- XScale
- Xtensa/Diamond
ARC
ThreadX for ARC Microprocessors
Highlights
Complete ARC support Reasonable pricing No Royalties Complete ANSI C source code Easy to use and powerful services Responsive Technical Support Unlimited Threads, Queues, Event Flags, Timers, Semaphores, Mutexes, Block Pools, and Byte Pools Flexible memory usage Timeout available on all thread suspension Advanced preemption-threshold technique Low-overhead Application Timers Size scales automatically picokernel architecture for size and speed Small footprint (Instruction area size: 4-25K) Fast Execution (100MHz, 0 wait-states, ARC)
Improve Your ARC Development
Let our extensive experience with the ARC family of microprocessors help your product development. ThreadX, our high-performance real-time kernel, helps improve your product's quality and its time-to-market. In addition, using ThreadX makes it easier to enhance your product in the future.
ARC Optimizations
ThreadX optimizes context switching on the ARC processor. When context switching occurs inside of a ThreadX service call, only the registers preserved across function calls are saved as part of the thread's context, i.e. registers r13-r26, fp, and blink.
A similar technique is used in interrupt handling. On the front end of interrupt service routines, only the compiler's scratch registers are saved initially (registers r0-r12). The full register set is saved only if thread preemption is required.
Fast Level2 Interrupt Response
ARC Level2 interrupts are left completely enabled throughout ThreadX processing, resulting in the fastest possible response.
ARC's MetaWare Compiler Support
ThreadX is completely compatible with the advanced ARC MetaWare development tools from ARC International. You are up and running right out of the box!
ARC International is a leading designer and developer of customizable, high-performance microprocessors and related intellectual property solutions for integrating microprocessors with embedded systems applications using ThreadX, which is the leading RTOS for the ARC processor. The ARC processor is an application specific processor or ASP, which can be customized for use in a wide variety of increasingly sophisticated products, including telecommunications, voice and data networking, and consumer electronics products. With ARChitect, an easy to use software program, customers are able to rapidly design and configure the ARC processor. In addition, the ARC processor can be repeatedly tested and verified by the customer at each stage of development, including pre- and post-fabrication, to ensure that the ARC processor is optimized and properly configured to satisfy each customer's requirements. The ARC processor can be manufactured with any semiconductor silicon process, thereby enabling customers of ARC to select the foundry of their choice. The web site for ARC is located at: http://www.ARC.com.
Embedded World 2012
February 28 - March 1, 2012
Nuremberg, Germany
